A power factor correction (PFC) topology and new control methodology are introduced for high-performance cost-effective power factor correction. The topology enables the use of cost-effective component materials and zero voltage switching (ZVS) operation over the entire line cycle. In addition, a new zero current detector circuit (ZCD) and algorithm are employed to enhance ZVS and total harmonic distortion (THD) while maintaining cycle-by-cycle control of the current. Proof of concept is demonstrated in a 5 kW prototype with a power density of 120 W/in3, an efficiency greater than 99.2% and a THD < 5%.
