Active gate driver (AGD) can suppress overshoots and oscillations caused by large dV/dt in the circuits that drive GaN HEMTs half-bridges while ensuring the driving speed. This study aims to enhance the performance of the AGD algorithm by incorporating the impact of load current on the dV/dt. Based on this, we propose a tri-current AGD prototype, in which a 4-bit current-based DAC is utilized to precisely control the drive current during the Miller Plateau (MP) period. Meanwhile, by sampling the load current, we instantiate the feedback control of the MP drive strength through a digital loop on FPGA. Experimental tests confirm that the proposed AGD circuit effectively maintains steady overshoot rejection across varying load currents.
.jpg "Wentao Liu (he/him/his) photo")