This paper presents a novel approach to multi-level bridgeless totem pole PFC designs by integrating 400V SiC MOSFETs. This arrangement enables exceptional efficiency and power density, effectively meeting the increasingly demanding requirements of AI server applications. The theoretical design leverages the unique characteristics of SiC technology to minimize switching device losses and reduce gate driver complexity, paving the way for more compact and robust power solutions. An experimental prototype will be developed to validate these theoretical predictions, demonstrating the practical viability of this approach in high-performance AI applications. The results are expected to set new benchmarks in power conversion efficiency and system reliability.
.jpg "Rytis Beinarys, BE PD (he/him/his) photo")