Double-Connected Submodules for Modular Multilevel Converters (MMC) have been a topic of interest in the past ten years due to their advantages in terms of reducing losses as well as footprint. Yet, there has been no practical implementation of them for use in Medium- or High-Voltage Direct-Current (MVDC, HVDC) applications due to the higher complexity compared to simple half-bridge or full-bridge submodules. A submodule topology that enables the reduction of semiconductor losses as well as capacitor size is the Double-Zero Submodule in Double Connection (DZDCSM). This paper presents a compact design of this topology based on 3.3-kV SiC MOSFET devices for a 2× 2 kV cell voltage rating. First measurement results on a full-scale prototype are presented.
