D14.8 - A 7 Bit 5A 6.7 GHz Gate-Shaping Digital Gate Driver with Burst-Sampling ADC for Iterative Switching Optimization of SiC Power MOSFETs

Thursday, March 20, 2025

11:30 AM – 1:30 PM ET

Location: Level One, Hall A3

Technical Dialogue Presenter(s)

Tobias S. Zekorn, MSc (he/him/his)

Integrated Analog Circuits and RF Systems at RWTH Aachen University

Presentation Paper

Co-Author(s)

KV

Kenny Vohl

RWTH Aachen University
EW

Erik Wehr

RWTH Aachen University
LW

Leon Weihs

RWTH Aachen University
MH

Michael Hanhart

RWTH Aachen University
RW

Ralf Wunderlich

RWTH Aachen University
SH

Stefan Heinen

RWTH Aachen University

Wide bandgap semiconductors provide the potential to significantly increase the efficiency of today’s power electronics while simultaneously their superior characteristics regarding dV/dt and dI/dt pose a challenge to EMI and EMC. This work presents a gate-shaping digital gate driver for reducing EMI and optimizing the switching behavior of HV SiC-power MOSFETs. It includes a 7bit 5A 6.7GHz driver unit, a 1.66MS/s burst ADC and separate dead time control, 8-phase 832MHz clock generation and PMU.