Cycle-by-cycle current limiting is a control strategy used to protect power electronic converters and loads by ensuring that the current does not exceed safe operating limits on a very fast, cycle-by-cycle basis, where a cycle typically refers to the switching period of a power electronic converter. However, Due to the current sampling delay caused by sampling circuit and analog-digital conversion rate, the current signal obtained by the firmware processor is lagging to the actual current, which causes delay in current limiting and protection. This paper proposes an optimized firmware-based cycle-by-cycle current limiting method, where the sampled current value is corrected on switching period scale to get a more accurate reconstruction of the actual current despite the sampling delay. The accuracy of this method is proved through experimental verification.
