Univ. Grenoble Alpes, CNRS, Grenoble INP, G2Elab, Grenoble, France
Final year PhD student working on packaging concepts dedicated to WBG semiconductors in a context of modularity, disassembly and performance. The main objective is to propose some packaging concepts to integrate the die at a lower granularity than the classical multi-chip power modules based on DBC technology, i.e. integrated the die in a defined prepackage like discrete devices with the performances of classical power module. These packaging concepts are related to the voltage withstand study, the electrical and thermal characterization of solderless interconnections and the development of different proof of concept.
My PhD thesis is supervised by Yvan Avenas from G2Elab (France) and Eric Vagnon form Ampere laboratory (France).
D11.6 - Electrical Characterization of Modular 3D Packaging Assembled with Compressed Metal Foams
Thursday, March 20, 2025
11:30 AM – 1:30 PM ET