Jack Knoll, MS (he/him/his)

Virginia Tech

Jack Knoll received his B.S. degree in electrical engineering from Miami University in 2020, and his M.S. degree from Virginia Tech in 2022. He is currently pursuing a Ph.D. degree in electrical engineering with the Center for Power Electronics Systems (CPES) at Virginia Tech. His research interests include wide bandgap semiconductor packaging, mathematical modeling, optimization, and package thermal analysis. Mr. Knoll was a Wide Bandgap Generation (WBGen) Fellow from 2020 to 2022.

Presentation(s):

• D04.12 - Dimensional Parasitics Absorption in Capacitively-Isolated Ćuk Converter for Medium-Voltage High Step-Down Converters

  Thursday, March 20, 2025
  11:30 AM – 1:30 PM ET

• D11.14 - Coaxially Nested 3.3 kV SiC MOSFET Packages with Uniform Interpackage Electric Field Distribution

  Thursday, March 20, 2025
  11:30 AM – 1:30 PM ET