This paper discusses the significance of VGS(th)=f(Tvj) in the reliable operation of paralleled SiC MOSFETs. The SiC MOSFET technology that attains lower dVGS(th)/dTvj, therefore less SiC/SiO2 interface traps density close to the conduction band edge, it can benefit from a minor temperature imbalance during parallel operation. Results from the experiments show that even if two pairs of DUTs have the same VGS(th) and transfer characteristic variation (at 25°C from the curve tracer), the technology with higher dVGS(th)/dTvj suffers from a more severe Tvj imbalance then the other.