This tutorial will provide a master class on designing, simulating, and measuring a scalable, 2000-Amp core power rail. The technological growth in data centers, AI, and custom ASICs has pushed the core power rail current to 2000 Amps and beyond. Designing such a power rail is a complex task involving architectural design choices, advanced end-to-end system simulations, and measurement validation challenges. This tutorial will leverage the DesignCon 2024 best paper titled “Design, Simulation, and Validation of a 2000-Amp Core Power Rail” to show a real working example of how it is done. Topics to be covered include: • How to design the PCB stack-up for 2000A? -What are the copper thickness considerations? -How many layers of copper are needed for a 2000A PDN? • What is the BGA ball-out structure necessary for the PDN? • DC voltage drop and Electrothermal considerations for a 2000A PDN • How to properly determine a sense point for a 2000A PDN • Modeling small signal and large signal responses for a 2000A VRM and PDN design • Introduction to Harmonic balance simulation and its importance for large signal modeling • How to model the load line response for 2000A PDN design • Building end-to-end digital twin simulations • Discussion focused on measuring small signal versus large signal. -What does the large signal phenomena look like? • Why use a step-loader for validation – How hard is this? • PDN measurement demonstration to validate and test a 2000A PDN design. • Why do we care about CMRR for PDN impedance measurements? • How do you measure a 40uOhm PDN? Participants will leave with an understanding of the advanced modeling and measurement techniques required to support the growing need for 2000A and higher PDN designs.
